Synopsys has lost over 20% from its high. HSBC still expects up to 64% upside
Synopsys $SNPS reported fiscal third-quarter revenue up 42% year over year. Yet the stock closed at $415 on September 29, down 23% from its 52-week high and 36% below its July 2025 record. Most of the growth came from last July's completed acquisition of simulation firm Ansys, which this year entered results for a full quarter for the first time. Excluding this effect, revenue rose about 8%, while main rival Cadence $CDNS expects to grow 19% this year, according to its own outlook.
Key points
Synopsys revenue grew 42% year over year, but four-fifths of the increase came from acquired Ansys. On a comparable basis the company grew about 8%, while rival Cadence targets 19% this year.
Synopsys paid $34.9 billion for Ansys, of which $23.46 billion was allocated to goodwill. Cost savings are already underway, but first revenue from joint products is not expected until 2027.
Nvidia last December bought Synopsys shares for $2 billion at $414.79 per share. Today the stock trades practically where it was then, 36% below its July 2025 record.
Adjusted operating margin should reach 41.5% this year, while GAAP operating margin will be only 10.4%. The gap is mainly due to acquisition-related amortization, which rises to $1.54 billion next year.
The market pays 27.5 times earnings for Synopsys and 40 times for Cadence. HSBC, with a $700 target, bets on monetizing AI agents, but the company has not yet disclosed standalone AI revenue.
Synopsys software is needed for design and verification by practically every advanced chipmaker, from Nvidia $NVDA to AMD $AMD. But after the Ansys acquisition the company carries $10 billion in debt and is betting on AI agents designed to handle entire parts of the chip design process on their own. HSBC $HSBC sees a business model shift, while the market sees mostly risk.
Four-fifths of this year's growth came from Ansys
For the fiscal third quarter (May through July 2026), Synopsys reported revenue of $2.477 billion versus $1.740 billion a year earlier. The result beat the top end of its own guidance and the company raised full-year revenue guidance to $9.69–9.74 billion, of which $2.98 billion is expected to come from Ansys.
Segment | Q3 FY2026 ($M) | Q3 FY2025 ($M) | Change |
|---|---|---|---|
Design Automation | 2,003.0 | 1,312.1 | +53% |
Design IP | 473.8 | 427.6 | +11% |
Total | 2,476.8 | 1,739.7 | +42% |
Note: Synopsys fiscal year ends October 31. The year-ago quarter includes Ansys only from the acquisition completion on July 17, 2025, about two weeks. Ansys is part of Design Automation.
Of the $737 million year-over-year increase, $622 million is attributable to Ansys, which contributed for a full quarter this year, according to the quarterly 10-Q report. The same report provides a pro forma figure: if Synopsys had owned Ansys for all of last year's third quarter, revenue would have been $2.290 billion. This year's result is about 8% higher than that. The pace is slightly depressed by divestitures of smaller businesses, which will reduce this year's revenue by about $150 million, according to the outlook note.
The core legacy business, chip design and verification software (EDA), grew 8.5%, according to CFO Shelagh Glaser. Management expects acceleration to double-digit growth in the fourth quarter and for the full year. Design IP, the sale of ready-made circuit blocks that chipmakers integrate into their own chips, returned to growth and its adjusted operating margin rose from 20.1% to 26.5%.
However, the base is low. The weak IP business, hit by export restrictions to China and problems at a major chipmaker customer that the market identifies as Intel $INTC, sent the stock down 36% on September 10, 2025. It was the worst day in the company's history.
The outlook is supported by a backlog of $10.9 billion at the end of July. Roughly half of that, excluding flexible framework commitments from customers, is expected to convert to revenue within the next 12 months, according to the 10-Q. A slight decline from the prior quarter is explained by the sale of the processor IP blocks division.
The 42% year-over-year growth therefore mixes three things that need to be separated for valuation: the pace of legacy EDA and IP, the contribution from Ansys, and the not-yet-quantified potential of new AI tools.
An advanced chip cannot be made without Synopsys or Cadence tools. Cadence is now growing faster
Modern chip design goes through dozens of sequential steps, from logic description through placement of billions of transistors to final sign-off, after which the manufacturer accepts the design for production. Each step is served by specialized software that chipmakers certify for each new manufacturing technology. When TSMC $TSM prepares the A14 process, customers must have certified design flows available before production starts. Synopsys announced A14 certification on September 23, along with support for CoWoS packaging that combines multiple chips into one package.